VHDL Type conversion function

Hello everyone,

In my undergraduate studies, I learnt Verilog before VHDL and hence I prefer to design in Verilog. In Verilog, there are just two data types for design, namely wire and reg. However, in VHDL, a signal / variable can be of different types like integer, std_logic, unsigned, signed etc. All these data types are used in different situation, eg:  '+'  operator is commonly used with unsigned data type.

For Verilog users who are migrating to VHDL, this becomes confusing to remember all the conversion functions. I found a figure which clearly shows all the conversion functions.

Answer record from Xilinx provides an example design of some conversion functions. 

AR# 45213

Creating a custom IP and integrating to Microblaze

Hi,

FPGA is used for various applications which involves complex processing and control of other devices. Typically, FPGA logic resources are used to do complex processing (using Verilog/VHDL hardware description languages) whereas a soft-processor like Microblaze is used to control other devices.

The following link is very useful which gives hands-on lab experience with emphasis on concepts and their implementation in EDK.

Xilinx Document :

Chapter 6 explains how to create a custom IP and integrate it with EDK.

As a continuation of this Xilinx tutorial, I would like to explain how to access custom IP from a C code.

Xilinx provides Xil_Out8 API to write to a particular address in EDK design.

Definition of function is as follows:

void Xil_Out8(uint32 address=,uint8 data);

Eg: Xil_Out8(2019557376=,255);

Note: Do not forget to include #include "xil_io.h" to use these API's.

The following link has information of all other API from Xilinx.

OS and Libraries Document Collection

Writing/Reading data from Compact flash from FPGA

Do you know how to read/write from Compact flash from an FPGA board ?

Last week, I was trying to do read/write operations to compact flash using FPGA. As usual, it was very difficult to get good documentation to do this.

A summary of the procedure to access files in a Xilinx FPGA board(ML605) is as follows: 

1. Created an XPS project (Microblaze based) and added compact flash IP to the design 

2. Generated bitstream and exported the design to SDK

3. Created a new software project - added the Libxil FAT system library in MSS project settings

4. Wrote a C code to open a file, read/write file ( by reading LibXil documentation)

5. Increase the stack and heap size of the application (to allow dynamic memory allocation) and store application in DDR memory by generating linker script. 

Note : There is no change in jumper settings (for ML605) and default files in compact flash are not to be modified. 

Check out the following links for more details:

http://forums.xilinx.com/t5/Embedded-Development-Tools/Write-1M-data-to-Compact-Flash/td-p/433398

http://www.dte.us.es/share/sde/Cursos_IMEC-XUP_1.6/Lab16V1.1_%20Software%20implementation%20of%20an%20MP3%20player%20%28EDK%208.2%29/Lab16Mod2V1.0.pdf